Tuesday, 25 October 2016

Physical Design Engineer

We are looking for Physical Design Engineers with 4 to 8 yrs experience for Bangalore/ Hyderabad location.

Please find the below JD: Design experience in all aspects of Physical Design . 
Low power design implementation is must. 
Proficient in Synopsys ICC.. 
Technologies: 14nm, 16nm, 20nm, 28nm . 
Experience in tools like ICC /SOC Encounter will be plus. 

Interested candidate please share your profile to supriya.singh@adeptchips.com

Monday, 24 October 2016

High Speed board Design engineer - HCL

Job description
High Speed Digital Board Design Job Description

Work Experience: 5-10 Years

Work Location: Bangalore/Chennai

Educational Qualification: B.E/B.Tech/M.E/M. Tech

High speed Board design (Digital Board Design) experience is mandatory.
Should have done complex boards with high component density.
Should have worked on full product development cycle and completed few products from scratch to manufacturing.
Extensive experience in EMI/EMC testing and resolving EMI/EMC issues.
Extensive design & validation experience of all low speed interfaces, Memory interfaces like DDR2/ DDR3, high speed interfaces like PCI, SATA etc.
Excellent knowledge of Allegro tool & Orcade Schematics. Strong into Concept HDL Schematics & signal integrity tool.

Internship -Intel

Job description
Internship: 12-month

The task assignments will be purely technical in the areas of System Verilog, Verification, VMM or UVM Methodology.


Qualifications:

Should be a BE/BTech/ME/M.Tech Graduate with Electronics & Communication
Engineering or Electrical & Electronics Engineering or VLSI engineering or any other equivalent courses
Should have basic knowledge of Verilog/VHDL
Should have strong knowledge in Digital logic

.NET Engineers Required

Interview Location:- Hyderabad

Job Location:- Hyderabad

.NET Senior developers - Exp required is 5-7 Yrs

.NET Architect / Tech Lead - Exp required is 7-11 Yrs

Please send suitable profiles to vidya.sagarrao@srgtech.com

Hardware Design Lead

Position: HW Design Lead
Location: BANGALORE
Experience: Should have strong experience in HW Design, Schematic, FPGA

If you are interested in the above described mandate, Kindly share your resume in ONLY in MS-WORD format to"thanveer@asppl.in" along with the following information. (All the details are mandatory for Screening,Kindly co-operate)

Total Exp:
HW Design Exp:
FPGA Exp:
Key Skills of the Candidate :
Qualification:
Current Location:
Current Designation:
Current Employer:
# of people reporting to the candidate:
Candidate Reports to:
Current CTC:
Expected CTC:
Notice Period:
Interested in Relocation to Bangalore:
Family members details with their Status:
Reason for the Change:

Thanks

Thanveer
https://www.linkedin.com/in/thanveers

Saturday, 22 October 2016

UPSC IES Exam - 2017

Before going through this , note that it is engineering student dream to get through IES and get a central government job. So, if you are passed out engineering student and trying for a government job, in case, if you missed this job advertisement, apply quickly.

Union Public Service Commission (UPSC) has released a notification to fill 440 engineering positions in various departments of the central government through Indian Engineering Services Examination 2017. Interested candidates may check the eligibility criteria and apply online till 26-10-2016.

Selection Process: 
Selection of candidates will be made on the basis of written test and interview.
How to Apply: Interested and eligible candidates may apply online through UPSC website 'www.upsconline.nic.in' on or before 26-10-2016.
Important Dates: 
•Last Date of Online Application: 26-10-2016

More details about UPSC IES Exam 2017, including vacancy details, eligibility criteria, selection procedure, how to apply and important dates, are mentioned below:
UPSC IES Vacancy Details:
• Post Name: Engineering Services Examination 2017
• No. of Vacancies: 440 Posts
Category-wise Vacancy Details:
Category I- Civil Engineering (Group A Services/Posts)
• Indian Railway Service of Engineers
• Indian Railway Stores Service (Civil Engineering Posts)
• Central Engineering Service
• Indian Ordnance Factories Service AWM/JTS (Civil Engineering Post)
• Central Engineering Service (Roads), Group-A (Civil Engineering Posts)
• Central Water Engineering Service Group 'A' (Civil Engineering Posts)
• Survey of India Group 'A' Service
• AEE (Civil Engineering Posts) in Border Roads Engineering Service Group 'A'
• AEE (Civil) of P&T Building Works Group 'A' Service
• Indian Defence Service of Engineers
• AEE(QS&C) in Military Engineer Service(MES) Surveyor Cadre
Category II- Mechanical Engineering (Group A Services/Posts)
• Indian Railway Service of Mechanical Engineers
• Indian Railway Stores Service (Mechanical Engineering Posts)
• Indian Ordnance Factories Service AWM/JTS (Mechanical Engineering Posts)
• Central Electrical and Mechanical Engineering Service (Mechanical Engineering Posts)
• AEE in Geological Survey of India Group 'A' Engineering Service
• Central Water Engineering Service Group 'A' (Mechanical Engineering Posts)
• AEE (Mechanical Engineering Posts) in Border Roads Engineering Service Group 'A'
• Indian Naval Armament Service (Mechanical Engineering Posts)
• Indian Defence Service of Engineers (Mechanical Engineering Posts)
• Assistant Naval Store Officer Grade-I (Mechanical Engineering Posts) in Indian Navy
Category III- Electrical Engineering (Group A Services/Posts)
• Indian Railway Service of Electrical Engineers
• Indian Railway Stores Service (Electrical Engineering Posts)
• Central Electrical and Mechanical Engineering Service (Electrical Engineering Posts)
• Indian Ordnance Factories Service AWM/JTS (Electrical Engineering Posts)
• Indian Naval Armament Service (Electrical Engineering Posts)
• Indian Defence Service of Engineers
• Assistant Naval Store Officer Grade-I (Electrical Engineering Posts) in Indian Navy
• AEE Group 'A' (Electrical Engineering Posts) in Corps of EME, Ministry of Defence
• Central Power Engineering Service Group 'B' (Electrical Engineering Posts)
Category IV- Electronics and Telecommunication Engineering (Group A & B Services/Posts)
• Indian Railway Service of Signal Engineers
• Indian Railway Stores Service (Telecommunication/Electronics Engineering Posts)
• Indian Inspection Service (Asst. Dir. Grade-I)
• Indian Radio Regulatory Service Group 'A'
• Indian Ordnance Factories Service AWM/JTS (Electronics and Telecom Engineering Posts)
• Indian Naval Armament Service (Electronics and Telecom Engineering Posts)
• Assistant Naval Store Officer Grade-I(Electronics and Telecom Engineering Posts) in Indian Navy
Job Location: All India
Eligibility Criteria for UPSC IES Exam 2017:
Educational Qualification: Candidate applying for IES exam must have obtained an Engineering degree from a recognised University/Institution.
Age Limit (As on 01-01-2017): 21 to 30 years
Age Relaxation 
• For OBC Candidates: 3 years
• For SC/ST Candidates: 5 years
• For PH Candidates: 10 years
Application Fee:
• General Category Candidates: Rs. 200
• SC/ST/PH/Female Candidates: NILL


Friday, 21 October 2016

Managers Required

Dear All, 

Hiring for below positions for Bangalore location. 

1. Project Manager / Product manager - CTC - 18 LPA 
Needs to have worked on tech product platforms. 

2. Technical Architect - 30 LPA 
Someone who is very experienced in handling the whole of technology. 

3. Technical consultant : - Networking/ Database admin / Linux experience. - 15 LPA 

4. Technical consultant : PHP - Need atleast 5 plus years of experience.. - 15 LPA.. 

Interested candidates please share their resume on deepshikhagoel04@gmail.com